Conventional data buffers in memory systems contain decision feedback equalizers (DFE) that correct for inter-symbol interference in streams of data bits. Sometimes a stream of the data bits is targeted for a single memory device in the memory system. Other times, different parts of the stream are targeted for different memory devices. When a stream targets multiple memory devices, buffers in the DFE circuitry can retain unwanted old parts of the stream when the stream changes to a new target. The old parts cause margin degradation for the received data. The incorrect buffering is commonly due to sequential but non-consecutive commands associated with the different targets.
It would be desirable to implement a method and/or apparatus for command sequence response in a memory data buffer.